ZeBu Probes
ZeBu fast emulators provide 3 types of probes to enable fast and efficient debug of your ASIC design - Static, Flexible, and Dynamic. Probes can be used to generate waveforms in fsdb, VCD or VPD format, and may also be used to implement monitors and checkers in the design.
Static Probes
Static Probes are inserted into the design during compilation, and enable access to critical signals at full emulation speed. Static Probes can generate waveforms using ZeBu's on-board trace memory, and can also be used as logic analzyer triggers, or as inputs to custom monitors using ZEMI-3. Use Static Probes on critical busses and registers that may be accessed frequently by the testbench or monitors.
Flexible Probes
Flexible Probes are inserted into the design during compilation, and can be added in greater numbers than Static Probes - more than 30k/FPGA. They only impact run-time performance when enabled for tracing, and can be compiled and enabled by group, to minimize the impact. Use Flexible Probes on design interface signals and for major functional blocks. Flexible probes can be used to implement software-based logic analyzers and checkers, which help locate and identify design issues without recompilation.
Dynamic Probes
Dynamic Probes provide full design accessibility and can be used to generate waveforms for any sequential and non-sequential node in the design, without any added logic or design recompilation. Dynamic Probes are selected at run-time, and can be used for detailed debugging of RTL sub-modules in the design. Use Dynamic Probes once the time and functional block of the error has been identified.
SEE ALSO
- Product: ZEMI-3
- Product: SystemVerilog Assertion Support
ZeBu Debug Features
