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HW/SW Co-Verification

An SOC is really ready to ship when the complete application works, not just when hardware simulations pass regressions. In other words, the ultimate test for a chip is to see it perform its application correctly and completely. That means executing the embedded software together with the RTL. Unfortunately, in these cases traditional RTL simulation runs out of steam trying to process such volumes of data.

ZeBu is the only "Visible Silicon Platform", offering:

• Virtual components that can easily be assembled and configured to build a complete platform, with all interfaces, devices and peripherals required for application execution
• Software execution and debug while keeping synchronized with the hardware (e.g. waveform dumping), so that you can see software registers or key buses respond to actual software drivers and applications
• Ability to immediately pinpoint and locate problems and malfunctions in a system simulation of billions of cycles, through hardware monitors and traces, as well as enabling all of the standard software debugger features
• Ability to analyze, benchmark and measure the performance of key components over long stress scenarios

ZeBu has the execution speed to simulate the full application, plus the unique co-debug environment that allows both hardware and software debugging. Hardware designers have access to waveforms of the chip, while software developers use their standard software debugger, typically connected through a JTAG interface to the chip. ZeBu's unique technology, which synchronizes simultaneous hardware and software views, allows for very easy debug of low-level software, initialization vectors and device drivers.

• HW / SW Co-Verification|
• Pre-Silicon Software Validation|
• Simulation Acceleration|
• SOC Emulation
• Transaction-Level Modeling|
• ZeBu "Smart" Debug|
• ESL Co-Emulation|
• Super-Block Verification
• Reconfigurable Computing|
• Processor models|
• Case studies