WARP
is a forum for the builders in our community to share practical
on-the-ground experiences, to provide a status update on
progress and to convey insights for those considering prototyping,
emulating, or modeling their ideas.
Talks
that address the following broad areas are encouraged:
- Multi-Core,
Many-Core Prototyping
-
Network-On-Chip Prototyping
-
Hardware Prototyping
-
Hardware/Software Co-Verification
-
Multi-core, Processor Architecture Emulation
- Performance
Modeling Using Reconfigurable Hardware
-
Integration of Prototyping, Modeling and Simulation Methodologies
- Multi-core
Design Space Exploration
- Simulation
Acceleration
- 3D
Emulation
Contributions are encouraged from all members
of the architecture community, including those considering,
embarking on a prototyping, emulation, or modeling effort.
Submission Details
Participants are invited to submit papers on the topics
of interest. Please register by
clicking here and include title in appropriate area.
Submissions should be emailed in PDF form to warp2010@ensta.fr.
Submissions should include an extended abstract
of 4 pages, double column, 10 point, single-spaced IEEE
format. PDF files should be titled with first author’s
surname and institution (ex: smith-ucxx.pdf)
Abstracts and slide presentations will be
posted online following the workshop.
Demonstrations
Hardware and software demonstration proposals are welcome,
either standalone or in conjunction with a talk abstract,
and should be a maximum of two pages. Please follow submission
details as described above.
Important Dates
-
Email submissions (PDF format only) by April 16, 2010
to warp2010@ensta.fr
- Author notification by May 7, 2010.
Deadline
extensions will not be granted
Early
submissions are encouraged
Journal
Paper IJPP Special Issue
Selected papers will be considered for a special issue of
the International Journal of Parallel Programming published
by Springer. www.springer.com/computer/foundations/journal/10766 |
