Organizing Committee

Omar Hammami, ENSTA ParisTech

Sandra Larrabee, Eve USA

Program Committee

Gilles Baillieu, Arteris

Jean-Marc Brault, Eve

Jean-Luc Gaudiot, UCI

Omar Hammami, ENSTA ParisTech

Dominique Houzet, Grenoble INP

Xinyu Li, ENSTA ParisTech

Dong Liu, Intel Labs, China

David Penry, BYU

Hyunchul Shin, Hanyang

Lionel Torres, LIRMM

WARP-2010 - The 5th Workshop on Architectural Research Prototyping

Held in conjunction with ISCA-37 St-Malo, France
Saturday, June 19, 2010

WARP 2010 FINAL PROGRAM

8:30 - 8:40 Welcome
Omar Hammami, ENSTA ParisTech

8:40 - 10: 00 Session 1 Hardware Platform and Tool Chains
Session chair:

• "An FPGA-Based Emulation Platform For Optical-Enabled System" Wenbo Shen, Xinxin Zhang, Qigang Wang, Xiangbin Wu, Prabhat Gupta, Dong Liu, Intel Corp., PRC.
• "BlueSSD: An Open Platform for Cross-layer Experiments for NAND Flash-based SSDs" Sungjin Lee, Kermin Fleming, Jihoon Park, Keonsoo Ha, Adrian Caulfield, Steven Swanson, Arvind, Jihong Kim, Seoul National University, MIT, UCSD.
• "Modeling and Instrumentation of Memory Hierarchies Using Functional Programming" Tomasz Toczek Dominique Houzet , Stephane Mancini, GIPSA-LAB, France.
• "Performance Estimation for the Exploration of CPU-Accelerator Architectures" Tobias Kenter, Marco Platzner, Christian Plessl, Michael Kauschke, University of Paderborn, Intel Microprocessor Technology Lab, Germany.

10:00 - 10:30 Break
Coffee break

10:30 - 12:30 Session 2 Manycore
Session chair:

• "Cache Tracker: A Key Component for Flexible Many-Core Simulation on FPGAs" Jonathan Woodruff, Greg Chadwick and Simon Moore, University of Cambridge, Great Britain.
• "DART: Fast and Flexible NoC Simulation using FPGAs" Danyo Wang, Natalie Enright Jerger, J.Gregory Steffan, University of Toronto, Canada.
• "Cycle-accurate 64+-Core FPGA Based Hybrid Simulator" G.X.Liu, G.H.Li, P.Gao, H.Qu, Z.Y.Liu, H.X.Wang, Y.B.Xue, D.S.Wang, Tsinghua University, PRC.
• "Automatic Embedded Multicore Generation and Evaluation Methodology: A case study of a NOC Based 2400-cores on Very Large Scale Emulator" O.Hammami, X.Li, L. Burgun, S. Delerse, ENSTA ParisTech, Eve, France.

12:30 - 2:00 Lunch
Lunch break